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Teaching Show image information

Teaching

Algorithms for Synthesis and Optimization of Integrated Circuits (3V, 2U; 6 CP ECTS)

This course will be given in English.

Course number in SS 2019: L.079.05805

Schedule

Tuesday, 11:00-16:00, in room O1.258: Lecture and Exercises

Course start date: April 9, 2019.

Course description

The course provides the most remarkable features of digital synthesis, and explains the details of transforming hardware description languages into circuit layouts. Besides, the major techniques for logic optimization are discussed, and then the efficient use of current design tools are exercised in practical sessions.

Content

  • Hardware modeling languages
  • High-level synthesis and optimization methods (i.e., scheduling and binding)
  • Logic Representation and optimization of two-level logic functions (exact and heuristic algorithms)
  • Espresso logic minimizer
  • Data structures for logic synthesis (binary decision diagrams)
  • Representation and optimization of multiple-level logic networks (Algebraic methods, and Boolean methods like controllability and observability computations)
  • Timing analysis and verification
  • Modeling and optimization of sequential logic networks (Retiming)
  • Libraries and binding
  • Placement and routing algorithms

Prerequisite

Digital logic design

Textbook

Giovanni De Micheli, Synthesis and Optimization of Digital Circuits, McGraw-Hill Higher Education, 1994.

Lecturer
Phone:
+49 5251 60-4344
Fax:
+49 5251 60-4250
Office:
O3.134

Office hours:

by appointment

The University for the Information Society