Completed Theses
- Karthik Chockalingam. Rapid FPGA Prototyping With Custom Design Flow Using RapidWright. Master's thesis. July 2020.
- Onkar Gadewar. Programmable Programs? - Designing FPGA overlay architectures with OpenCL. Master's thesis. Feb. 2018.
- Christian Tölke. Sicherheit von hybriden FPGA-Systemen in der industriellen Automatisierungstechnik – Anforderungen und Umsetzung. Master’s thesis, July 2016.
- Gunnar Wüllrich. Dynamic OpenCL task scheduling for energy and performance in a heterogeneous environment. Master’s thesis Apr. 2016.
- Michael Lass. Localization and analysis of code paths suitable for acceleration using approximate computing. Master’s thesis, Dec. 2015.
- L. Funke. An LLVM based toolchain for transparent acceleration of digital image processing applications using FPGA overlay architectures. Master’s thesis, Sept. 2015.
- Felix Wallaschek. Accelerating programmable logic controllers with the use of FPGAs. Master’s thesis, July 2015.
- Thomas Löcke. Instance-specific computing in hard- and software for faster solving of complex problems. Master’s thesis, Mar. 2015.
- M. Damschen. Easy-to-use on-the-fly binary program acceleration on many-cores. Master’s thesis, Aug. 2014.
- Robert Mittendorf. Advanced AES-key recovery from decayed RAM-dumps using multi-threading and FPGAs. Master’s thesis, Aug. 2014.
- Marcel Brand. A generalized loop accelerator implemented as a coarse grained array. Master’s thesis, Mar. 2014.
- Philipp Steppeler. Beschleunigung von Einzelbild-Erkennungsverfahren auf Datenfluss basierenden HPC Systemen. Bachelor’s thesis, Apr. 2013.
- Denis Dridger. Design and implementation of a nanophotonics simulation personality for the Convey HC-1 hybrid core computer. Master’s thesis, Sept. 2012.
- Christian Bick. Beschleunigung von Tiefenberechnung aus Stereobildern durch FPGA-basierte Datenflussrechner. Bachelor’s thesis, Dec. 2013.
- Heinrich Riebler. Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs. Master’s thesis, June 2013.
- Henning Schmitz. Stereo matching on a Convey HC-1 hybrid core computer. Bachelor’s thesis, May 2012.
- Daniel Welp. User-space scheduling for heterogeneous system under Linux. Diploma thesis, Nov. 2011.
- Jörn Schumacher. Beschleunigung von Nanophotonik-Simulationen mittels des Convey HC-1 Hybrid Core Computers. Bachelor’s thesis, July 2011.
- Hendrik Kassner. MPI-CUDA Codegenerierung für Nanophoton Simulationen auf Clustern. Bachelor’s thesis, June 2011.
- Tobias Wiersema. Scheduling support for heterogeneous hardware accelerators under Linux. Master’s thesis, Nov. 2010.
- Arne Schwabe. Analysis of algorithmic approaches for temporal partitioning of sequential circuits. Master’s thesis, Oct. 2010.
- Manuel Niekamp. Transparente Hardwarebeschleunigung durch Shared Library Interposing. Diploma thesis, May 2010.
- Denis Dridger. Soft microprocessors with tightly coupled application-specific coprocessors. Bachelor’s thesis, Mar. 2010.
- Martin Tofall. Compiler for a custom instruction set CPU. Diploma thesis, Sept. 2009.
- Marc Östermann. Raytracing on a custom-instruction set CPU. Bachelor’s thesis, Oct. 2008.