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Reconfigurable Computing (6 CP, 2V+3Ü)

This course will be given in English and starts on Tuesday, October 11, 2022 at 11:15 hours in room O2

Subject and Goal

The course Reconfigurable Computing introduces into the field of computing with reprogrammable hardware structures. Computing systems built from reprogrammable hardware structures do not rely on a fixed hardware, but adapt their hardware architecture to the application under execution. The field was formed in the early 1990s when Field-programmable Gate Arrays (FPGAs) became commercially available that were powerful enough to be used for computing. Today, FPGA-based high-performance systems have outperformed state-of-the-art computers for many problems including database search, genomic sequence scanning, and cryptography. In embedded systems, FPGAs accelerate system functions, reduce system cost and energy consumption, and enable hardware-on-demand functionality. The course covers the following list of topics:

  • Introduction to reconfigurable computing 
  • Evolution of programmable hardware devices
  • FPGA architectures
  • Computer-aided design for FPGAs
  • High-level languages for programming FPGAs
  • Application domains for FPGAs
  • Comparison of devices, technologies, and reconfigurable systems

To get a first impression please check out the Introduction slides (PDF).

Who Should Take this Course?

This is an elective course for students of the Master programs Computer Science and Computer Engineering. There are no formal prerequisites for taking this course. However, since the course covers a wide range of topics from the architectures of micro/nano-electronic devices to algorithms for design automation, and the lab includes programming of hardware and software, we expect that students have completed Bachelor-level courses in digital design, algorithms, and programming.

Teaching Model and Materials

As e-learning platform we will use this PANDA course, where lecture slides, exercise sheets, screencasts with audio/video tracks, lab instructions and further materials will be made available. 


Prof. Dr. Marco Platzner

Technische Informatik

Marco Platzner
+49 5251 60-5250
+49 5251 60-4250


by appointment

Lab Coordinator

Felix Jentzsch, M.Sc.

Technische Informatik

Felix Jentzsch
+49 5251 60-5395

Die Universität der Informationsgesellschaft