Alfonso Rodriguez, Andres Otero, Marco Platzner, and Eduardo De la Torre got the journal paper “Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs” accepted for publication with the IEEE Transactions on Computers. The paper shows how to combine ReconOS’ hardware/software multi-threading model with a data-parallel approach to create a versatile reconfigurable architecture targeted towards edge computing. The work is a joint effort with colleagues from the Center for Industrial Electronics at Universidad Politecnica de Madrid in Spain, and the paper is an outcome of Alfonso Rodriguez’ research stay at the Computer Engineering Group of Paderborn University, that was funded by a HiPEAC Collaboration Grant.
