Al­gorithms for Syn­thes­is and Op­tim­iz­a­tion of In­teg­rated Cir­cuits (3V, 2U; 6 CP ECTS)

This course will be given in English.

Course number in SS 2021: L.079.05805


Due to the current situation with the Corona virus SARS-CoV-2 and the corresponding measures of Paderborn University we will run this course fully in online form. The central platform for the course is PANDA. We will provide all further information via PANDA, and this website in particular about the lectures, assignments, and lab sessions. For the lectures, we will mix synchronous sessions with "flipped/inverted classroom" sessions, where lecture slides and a screencast+audio will be made available for self-study and in a later meeting there will the opportunity to discuss issues and doubts and pose questions. During the originally planned weekly lecture slots, i.e., Wednesdays from 08:15-10:45 and Thursdays from 14:15-15:45 , we will have online lectures via ASOIC online room in IMT BigBlueButton and we discuss any open issues and answer questions. The first online lecture chat will take place on 14.04.2021 at 08:15 am.

A brief in­tro­duc­tion about the ASO­IC course

Course de­scrip­tion

The course provides the most remarkable features of digital synthesis, and explains the details of transforming hardware description languages into circuit layouts. Besides, the major techniques for logic optimization are discussed, and then the efficient use of current design tools are exercised in practical sessions.


  • Hardware modeling languages
  • High-level synthesis and optimization methods (i.e., scheduling and binding)
  • Logic Representation and optimization of two-level logic functions (exact and heuristic algorithms)
  • Espresso logic minimizer
  • Data structures for logic synthesis (binary decision diagrams)
  • Representation and optimization of multiple-level logic networks (Algebraic methods, and Boolean methods like controllability and observability computations)
  • Timing analysis and verification
  • Modeling and optimization of sequential logic networks (Retiming)
  • Libraries and binding
  • Placement and routing algorithms


Giovanni De Micheli, Synthesis and Optimization of Digital Circuits, McGraw-Hill Higher Education, 1994.

SP Khatri, K Gulati,  Advanced Techniques in Logic Synthesis, Optimizations and Applications, Springer, 2011.

S Hassoun, S Tsutomu, Logic synthesis and verification, Springer, 2012.