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Teaching Show image information


Soundgates – Interactive Music Synthesis on FPGAs

Project group
CS Master's Program
Lecture Number: L.079.07004
Term: SS 2013 / WS 2013/14


This project aims at developing an interactive music synthesis system on an FPGA platform. To this end, a library of basic components for sound generation will need to be designed and implemented as digital circuits for FPGAs. These library elements can then be assembled into a network of components that can be used for translating musical scores to sound and as building blocks for interactively controlled generative sound synthesis. The overall goal of the project group is to develop a prototype for such an interactive music system where one or several users can interactively control the sound that is generated by means of advanced sensors, e.g. motion capturing via Microsoft Kinect Cameras, Wii-style game controllers, or motion and light sensors integrated in smartphones.

For reaching this goal, the following subtasks are proposed:

  1. Development of a library of basic components for sound generation, such as frequency generators, envelope generator, modulators, mixers, filters, delays for FPGAs as software models and as digital circuits implemented in VHDL. Integration of these components with the ReconOS reconfigurable operating system for FPGAs.
  2. Development of a graphical design environment that allows for assembling the basic sound generation components into complex sound generator networks that emulate analog and digital synthesizers. This tool could draw inspiration from similar tools for pure software based music synthesis, e.g. Cycling 74 MAX or Puredata. The design environment shall then allow for translating the component network to software and hardware implementations.
  3. Development of a sequencer component that allows for converting musical scores, e.g. in MIDI format, to sound using the generated synthesizer networks.
  4. Evaluation of sensors for capturing user interactions, e.g., Microsoft Kinect, game controllers, or smartphones. Development of a prototypical demonstrator of an interactively controlled generative music system.


In order to participate in this project group you should have a very good knowledge of digital circuit design and hardware description languages (VHDL or Verilog). Ideally, you also have some experiences with the Xilinx FPGA design environment. Previous experiences in digital music synthesis, though helpful, are not required. You should however have a very strong interest in digital signal processing.

Further information

If you have any questions, feel free to get in touch with any of the advisors for this project group.


Prof. Dr. Christian Plessl

High-Performance IT Systems

Christian Plessl
+49 5251 60-5399
+49 5251 60-1714

Office hours:

In winter term 2019/2020 the consultation hour for students is Tuesday from 2:00-3:00 pm

Prof. Dr. Marco Platzner

Computer Engineering

Marco Platzner
+49 5251 60-5250
+49 5251 60-4250

Office hours:

by appointment

The University for the Information Society