Recently, using WiFi access points (APs) as sensor nodes by passively analyzing WiFi signals, particularly the Channel State Information (CSI), has attracted a lot of interest. This emerging technology is currently progressing towards standardization under IEEE 802.11bf, which is expected to be finalized around 2025. Of particular interest is the detection and identification of humans, their activities, motion, gestures, and other relevant information.
Motivated by previous successes in vision and language processing domains, current trends indicate a shift from classical signal processing approaches towards deep learning based methods. However, these learning based methods rely on the availability of suitable training datasets and might cause an increased demand for memory and computational resources due to growing model size and complexity.
Depending on the specific application, various considerations come into play. Latency becomes crucial for real-time applications such as motion and gesture recognition, where timely responses are required. Throughput becomes a concern when scaling the system to a large number of nodes, antennas, or high sample rates. Resource and energy efficiency are particularly important at the edge, where power consumption and computational resources are limited.
Using FPGAs allows for efficient deployment of such deep learning models by building custom hardware accelerators to match the latency, throughput and resource constraints of the application by leveraging model compression techniques and the parallelization potential of the FPGA accelerator. To the best of our knowledge, no such FPGA-based DNN accelerator for wireless human sensing has been employed so far.