Open topics for Master's and Bachelor's theses
Currently, we are offering the following topics for Bachelor's and Master's thesis topics. If you have a specific interest or a concrete idea for a topic related that is a aligned to the research areas of our group, we will be happy to discuss your ideas and defined a suitable thesis topic on a case by case basis.
Please get in touch with the contact person stated in the table below for more details.
External theses: Our group maintains cooperations with academic and industrial research groups in Europa and beyond. We will also announce these possibilities below. Please note that we are not interested in supervising external Master's theses unless there is an established cooperation.
Proposed topics
Topic | Project Type | Contact |
| New topics announced for winter term 2023 | ||
| An Interactive Julia Interface for FPGAs | BSc/MSc | Marius Meyer |
| Efficient FPGA-to-FPGA Collective Communication in ACCL | BSc/MSc | Marius Meyer |
| Floating-Point Number De/Compression on CPUs | BSc/MSc | Robert Schade |
| Machine Learning for Electron-Repulsion Integrals | MSc | Robert Schade |
| Analysis of Bit-level Operations on FPGAs | BSc | Tobias Kenter |
| FireSim: FPGA-accelerated full-system hardware simulation | BSc/MSc | Heinrich Riebler |
| Older open topics | ||
FPGA Acceleration of Shallow Water Simulations (follow up project to a recently completed thesis possible) | MSc | |
MSc | ||
MSc | ||
BSc | Lukas Mazur, Carsten Bauer, Christian Plessl | |
Detection of Pathological HPC Jobs (automated runtime and post-execution analysis, instrumentation, monitoring) | MSc | Christian Plessl |
Recently Completed Projects
Topic | Project Type | Supervisor |
MPI Communication Benchmarking with Julia | MSc | Carsten Bauer, Christian Plessl |
Profiling and Optimization of Energy Efficiency of Deep Neural Network Inference on FPGA | MSc | Christian Plessl |
Tomasulo Simulator Web Application | MSc | Heinrich Riebler, Christian Plessl |
Entwicklung und Optimierung eines Designs zur Berechnung der Autokorellationsfunktion auf FPGAs | BSc | Tobias Kenter |
Checkpointing and Restarting of HPC Computations | MSc | Lukas Mazur |
Sparse BiCGSTAB Solver Library Implementation for Intel and Xilinx FPGAs | MSc | Tobias Kenter |
HPC Job-Data Analysis | MSc | Robert Schade, Christian Plessl |
Massively Parallel 4D Stencil Computations in Julia | MSc | Carsten Bauer, Lukas Mazur, Christian Plessl |